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A High Performance Computing (HPC) Training Workshop was held at Purdue, Aug 6-7 2007, in the Envision Center . This workshop
was jointly sponsored by the Computing Research Institute (CRI) and the Rosen Center for Advanced Computing (RCAC).
HPC is playing an increasingly important role in many areas of research in Science and Engineering, and there is an urgent
need to train more researchers in the use of this technology. The National Science Foundation is making large investments
in HPC to enable research solutions that were not possible in the past. Interestingly, the National Science Board meeting
to decide on over $300 million of spending on HPC took place at the same time as our HPC Training Workshop.
The agenda for this workshop was designed to address these needs. A new feature of the workshop was the inclusion of a
presentation on multicore architectures by Prof Vijaykumar from Purdue’s ECE Dept, who is a nationally recognized
expert in computer architecture. Multicore architectures present a new challenge and an opportunity in all areas of
computing including HPC, and including this topic in the workshop was very timely. Other presentations by faculty members
covered Parallel Programming Models (Prof. Sam Midkiff, ECE), HPC architectures (Prof Mithuna Thottethodi, ECE) and OpenMP
(Prof Rudi Eigenmann, ECE). Additional topics were covered by RCAC staff members, on topics that included MPI programming,
the use of the TotalView parallel debugger, the Condor system for accessing unused cycles, and the use of software tools
for analyzing performance and increasing programmer productivity.
The hands-on lab sessions were designed to give the workshop attendees a practical feel for the use of HPC resources, and
parallel programming techniques.
The response to the workshop was very strong. The hands-on aspect led us to limit the number of attendees we could
accommodate to 18, and we had over 25 people wait-listed. We are considering offering the workshop a second time in the
near future. The Network for Computational Nanotechnology (NCN) that operates the nanoHUB provided technical support for
taping the workshop, which will be made available on the web.
The agenda for the workshop is below.
Monday, Aug 6
| Registration opens |
12:45 PM |
|
| Welcoming remarks |
1:00 - 1:15 PM |
Prof Rudi Eigenmann |
| Parallel Programming Models |
1:15 - 2:00 PM |
Prof Sam Midkiff |
| Multi-core architectures |
2:00 - 2:45 PM |
Prof Vijaykumar |
| Break |
2:45 - 3:00 PM |
|
| Parallel Programming with MPI |
3:00 -3:45 PM |
Dave Seaman |
| Getting started and Hands on Lab |
3:45 - 5:00 PM |
RCAC staff |
Tuesday, Aug 7
| Breakfast snacks |
8:30 - 9:00 AM |
|
| High-end HPC architectures |
9:00 - 9:45 AM |
Prof Mithuna Thottethodi |
| Open MP |
9:45 - 10:30 AM |
Prof Rudi Eigenmann |
| Break |
10:30 - 10:45 AM |
|
| TotalView Debuggger |
10:45 - 11:15 AM |
Dave Seaman |
| Hands On Lab |
11:15 AM - 12:00 noon |
RCAC staff |
| Lunch break |
12:00 noon - 1:00 PM |
|
| Grid Computing in Condor |
1:00 - 1:30 PM |
Tom Kesler |
| Porting, Tuning, and Performance Analysis Tools |
1:30 - 2:15 PM |
M. Sayeed |
| Software Productivity Tools |
2:15 - 2:45 PM |
Dave Seaman |
| Break |
2:45 - 3:00 PM |
< /td>
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| Hands On Lab |
3:00 - 5:00 PM |
RCAC staff |
| Workshop ends |
5:00 PM |
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